Digital Design Verification Internship (16-Month Co-op)
Mississauga, ON
Internship
Hybrid
Intern
Synopsys creates high-performance silicon chips that support pervasive intelligence and connected technologies. The Digital Design Verification Intern will verify next-generation SERDES products by developing testbenches, writing assertions, debugging simulations, analyzing coverage, and exploring AI-assisted verification technologies.
Responsibilities
Define and track Verification Testplans to ensure comprehensive coverage of design functionality
Design and write constrained-random SystemVerilog testbenches using Verification Methodologies such as UVM (Universal Verification Methodology)
Write SystemVerilog assertions and debug RTL and gate-level simulation failures
Conduct functional and code coverage analysis to identify gaps and improve verification quality
Explore cutting-edge applications and uses of AI-assisted technologies in verification and ASIC design, contributing to innovation in the field
Qualification
Required
Currently pursuing a Bachelor's degree in Computer Engineering, Electrical Engineering, or a related discipline
Strong understanding of digital logic fundamentals
Must be familiarity with Verilog and SystemVerilog
Experience writing scripts in languages such as Perl, Unix shell, or Python
Experience with object-oriented programming languages (C++, Java, Python, etc.)
Independence and ownership mindset – you'll need to figure things out on your own at times and take responsibility for your work
The willingness to learn and grow
Preferred
Benefits
Hybrid working model combining remote work and in-office collaboration at the Mississauga office
Hands-on experience through real-world projects
Opportunity to collaborate with passionate teams worldwide
Opportunity to share ideas, unleash creativity, and explore interests
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products.
